Egads, it seems AMD can't catch a break these days. I sure hope they are able to get that B3 stepping out the door on schedule... IMO there's an awful lot riding on them getting it right this time.

Although I'm not planning any major upgrades in the next year or so, when it eventually becomes time for a new build, I want there to be stable, competitively performing AMD CPUs available. If nothing else, Intel needs the competition to keep 'em honest! :D

I've made a couple of corrections to the text of this story. For more info, please see here:

http://techreport.com/discussions.x/13764

So I guess the sky is falling. The problem with Scott’s blow by blow Super Bowl Coverage of the Phenom errata is that…. this has happened before. With the Intel Core and Xeon processors. It was a TLB errata that would cause corruption of data and system locks. Sound familiar?? There was a BIOS update or if you so chose there was a Windows XP hot fix, which also resolved the issue. Want to check it out here is the link:

http://techreport.com/forums/viewtopic.php?t=43352&view=next&sid=a3...

While I am completely pissed at AMD for being seemly in a perpetual downward spin, I am also quite concerned about all of these doomsday articles. First it was .. the horrible pre-production spider platform, then we had the AMD sent us to Tahoe, but didn’t give us any chips, then followed up with Intel class and grace article, and now we are onto the TLB errata. All of these articles within 2 weeks, I would say there’s been about seven or more articles here all around the horrible natures of AMD and the latest actual review or benchmark happened around what November 19th I think.

At least which would be awesome is to show us some benchmarks or something around the errata before and after fix to showcase what the average user can expect.

I am trying to walk a very fine line as an AMD fan, but also recognizing that when AMD screws up they need to be held accountable. Thing is I don’t think this is TR’s way of holding them accountable. This seems to be more of a FUD extravaganza. We are weeks away from Christmas, the biggest holiday shopping season, and when I go to TR the biggest headline is Phenom TLB errata????

I was rereading the article and noticed that motherboard manufacturers are required to implement the errata fix in BIOS and have it enabled by default, with the only way to change it is to use Overdrive. What happens to the AM2 (not AM2+) users? (Note that I am currently under the impression that only RD7xx chipsets can use Overdrive).

I still don´t fully understand what part of the CPU is really affected.

Is the L3 of the Phenom really indexed with virtual adresses? How does that work with a shared cache with 4 different cores accessing it?

If the L3 uses physical adresses, what do you need an TLB for?

Or are we talking about a defect of the third level TLB, independent of the cache architecture? Sort of like: if you don´t find the physical adress in the first TLB, you look in the second, and then in the third TLB?

Can anyone clear this up, or is this Erratum still in the muddy waters of PR-Talk and nobody really knows anything about it outside of AMD?

Penyrn-based C2Ds will be in full force by the time B3 Phenoms roll out. It is a darn shame that a significant logic bug has effectively crippled Phenom line in the eyes of enterprise market and enthusiast.

awful, and I was so close to purchasing a 9500 off newegg(now that they are $240).

I've updated the article with a clarification from AMD about how control over the BIOS workaround will be exposed to end users.

This is actually quite sad. Intel needs competition. AMD is not providing it right now.

For the new triple core Phenoms coming out, I wonder if AMD is going to use the real estate on the chip used for core #4 to cram as much L3 cache as they can onto it. Make those triple cores support the latest and greatest DDR3 memory too ... make that L3 cache run at the same speed as the cores. Make a triple core like this for the desktop and I think it could be winner.

I'm thinking that a triple core with a lot of L3 cache is faster/better than a quad core with not as much cache ... not so sure that 4th core will make much difference with the software out there these days ... not a whole lot of software to take advantage of the additional threads.

Hey guys I got a question:

Just how show-stopping is this errata? Are we looking at just more BSODs on Vista? Chance of system hang? I've read the article and the TLB erratum doesn't sound horrible, just moderately sucky. I mean, I guess if you're running Barcelona-based Opty's on a high-traffic webserver, you'd want some reliability, but for a desktop Phenom is a 10% higher BSOD chance during bf2 sessions really that bad?

I dunno, just asking… this really that much of a deal breaker?

Saucier said the person responsible for the updates is "on vacation,"

For some reason that sounded ominous. Like, is he vacationing in the Bahamas, or at the bottom of Lake Superior?

Look, I'm a big AMD fan, always have been. But this is unacceptable.

AMD's biggest hurdle to market share gain in the enterprise market (the lowest volume, highest margin sector) is the perception of reliability and consistency. The fact that they pushed such a vital component out the door knowing it had such a glaring flaw basically sabotages a significant portion of the good will they've slowly gained over the past few years with the Opteron platform.

This is absolutely ridiculous. There's no excuse.

At least the triple core processor inventory will be fat.
I hear they will make a triple-core CPU for every other Quad core fabbed.

"And although AMD is no longer shipping quad-core Opterons to major server vendors and general customers, it is shipping Phenoms to large PC builders and distributors".

Geez, don't you just want to go out and buy a brand new flawed chip? I was a hard-core AMD person until the past year, when I got tired of waiting and built two c2d systems. But I still thought of AMD as reputable, reliable. I don't know now. I can see the headlines: Chip flawed, but AMD still selling it.

Wonder how they feel about that "True Quadcore" decision now?

It bothers me a whole lot more that they sought to be quiet and work behind the scenes to the bitter end rather than just be open about it. I could understand being quiet if the product hadn't been released, but this kitty is in the wild.

Sounds like to me AMD has a whole lot more people "on vacation" than just the ones they are willing to admit (deny) to. If they only have one person in charge of notating errata and no backup in case they quit or die, then just what the hell is their plan for finding the errata... the microsoft release and hotpatch.

Mid to late Q1 for a fix? AMD is really lost if they think the whole pc market is waiting that long. At that point they might as well just write off 65nm quads and release the fix in a die shrink to 45nm. That would be the only hope of saving the AMD/ATItanic. If I was AMDs head of sales and could have seen this coming I would have bailed too.

Guess it's time for AMD to spit out a 'FX' series of products.

Any correlation to the scarcity of current chips with TLB errata problem and the near future release of (alot) of tri cores? Are tri cores nothing but binned bad B2 quad core chips with one disabled?

DAMIT indeed. I guess I will wait for the tri-cores to make my next buying decision.

What I think is ridiculous is that a dual core Phenom is only about 10% faster than AM2 at the same clock speed and, currently, the fastest AM2 (3.2Ghz) has about 40% faster clock speed than the Phenom 9600 (2.3Ghz).

Pure Panic on AMDATItanic!
That's a hell of a mess.

I am soooooo happy I went with a P35+E6750 instead of waiting for the Phenom!

10-20% slower = effectively shaving off more than 200 MHz. Or does the 10-20% slowdown only occur in certain conditions and not constant as I thought?

All the more reason to wait for the dust to settle a bit on these new processors and BIOSes.

Intel FTW.........