Future AMD processors will support the same AVX instruction set as Intel’s next-gen Sandy Bridge CPUs. AMD Senior Architect and Fellow Dave Christie made the announcement on AMD’s Developer Central blog this morning, saying his company has shifted focus away from SSE5 in an ostensible effort to make things easier for software developers.
First, a quick refresher: in August 2007, AMD announced SSE5, an instruction set it said would materialize as part of the Bulldozer architectural refresh two years later. In March 2008, Intel revealed that Sandy Bridge—the next major architectural refresh after Nehalem—would include a new instruction set dubbed Advanced Vector Extensions, or AVX. Intel published the AVX spec (PDF) the following month. Finally, in November 2008, AMD posted a new roadmap showing it had postponed Bulldozer until 2011.
According to Christie, AVX brings “somewhat different” implementations of some of SSE5’s features—particularly “the three- and four-operand capabilities, the Fused Multiply/Add instructions, and some of the permute instructions.” However, Intel’s spec also contains other enhancements: double-width SIMD floating-point operations, non-destructive three-operand support for legacy SSE instructions, and enlarged opcode space for future extensions. Because of the overlap and the extra AVX features, AMD felt compelled to support the Intel extensions.
That doesn’t mean the smaller chipmaker has turned its back on SSE5 altogether, though. Christie says SSE5 “was based on months of discussions with [software vendors] on what sort of capabilities they felt were needed,” so features that weren’t duplicated in the Intel AVX spec will live on in AMD’s new XOP, CVT16, and FMA4 extensions. (The blog post covers those in more detail.)
Christie doesn’t say which AMD processors will support AVX, XOP, and the other new extensions, but it’s probably reasonable to expect them in the first Bulldozer CPUs in 2011. Intel, meanwhile, plans to have AVX-toting Sandy Bridge processors out in 2010. Both Bulldozer and Sandy Bridge will debut on 32nm silicon. (Thanks to The Register for the link.)
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