Memory subsystem performance
We've been in a rut since, like, 1999, and we're not about to stop opening our CPU reviews with memory bandwidth results now. Ten years is so close I can taste it!

As expected, the QX6850 achieves higher bandwidth thanks to its 1333MHz front-side bus, yet it comes in slightly behind the E6750. Why? Glad you asked. Probably because the QX6850 has to share that bus between three devices: the chipset and two separate CPU chips. The additional loading on the bus limits the QX6850's bandwidth, giving the E6750 a minor but measurable edge.

Of course, the AMD chips, with no front-side bus to speak of, post big numbers here.

Here's a look at cache and memory bandwidth, and as you can see, the QX6850 is right in line with expectations once again. This test appears to measure cumulative cache bandwidth, which is why the quad-core systems produce much higher numbers than then dual-core ones based on the same microarchitecture. The Intel "V8" dual-Xeon rig is pretty much just showing off here. None of the other CPUs like the Xeons.

Since it's hard to see it on the line graph, here's a quick look at the bandwidth results for the 1GB test block size.

Even with a 1333MHz bus and smart on-chip logic for speculatively moving loads ahead of stores in certain situations, the QX6850 can't quite match the memory access latencies achieved by the Athlon 64's integrated memory controller. Intel keeps getting closer on this front, though. And, of course, these are mere synthetic tests that provide some interesting info but don't predict real-world performance.