Our tests results have shown us, pretty well conclusively, that the Core 2 Duo E6750's faster front-side bus only offers minor, incremental performance gains over its E6700 predecessor. That's not entirely bad news. The E6750 is still much faster than any dual-core CPU from AMD, and we've learned that current Core 2 Duo processors aren't really hitting a bus bottleneck. That revelation may seem counterintuitive to those of us who watched the Pentium 4 post great gains in performance from nearly every bus speed bump it received, but the Core 2 is much more efficient in its use of bus and memory bandwidth than the Pentium 4 and its offshoots were. That's one reason Intel can get away with packaging two Core 2 chips together in a single socket for quad-core action—there's room on the bus for both of 'em.
That's not to say the 1333MHz front-side bus won't have its uses. The most obvious candidates to benefit from the 1333MHz bus are those very same quad-core processors. In fact, Xeons have been using a 1333MHz bus for quite some time now, with great success. Also, our E6750's ample overclocking headroom suggests Intel could introduce much higher speed grades of the Core 2 Duo if so desired, and those chips could likely use the extra bandwidth—especially with fast DDR3 memory coming into its own. Further down the road, Intel plans to pack 6MB of L2 cache into its 45nm processors, which works out to 12MB of total L2 cache on a dual-chip package. Those caches will have to be fed.
Unfortunately, most of those uses don't apply to the E6750. Then again, there's no major penalty to adopting this new bus speed baseline, either. The E6750's one weakness here is its inability to drop its multiplier below 6X. That's a bit of a step backward on the idle power efficiency front. I'd like to see Intel move to more aggressive lower multipliers like AMD has with Cool'n'Quiet, if possible. That's a minor concern, though, in the grand scheme, and the move to a faster bus only solidifies the Core 2's grip on the CPU performance crown. 
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Last by monitor at 1:05 PM on 06/28/07 - Email the author(s): Scott Wasson
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